Extracting Exact Time Bounds from Logical Proofs

نویسندگان

  • Mauro Ferrari
  • Camillo Fiorentini
  • Mario Ornaghi
چکیده

Accurate evaluation of delays of combinatorial circuits is crucial in circuit verification and design. In this paper we present a logical approach to timing analysis which allows us to compute exact stabilization bounds while proving the correctness of the boolean behavior.

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تاریخ انتشار 2001